The UALink Consortium was formed with the goal of developing interconnect technical specifications that facilitate direct load, store, and atomic operations between AI Accelerators.
UALink primary areas of focus:
Enable low latency/high bandwidth fabric
Support hundreds of accelerators in a pod
Facilitate simple load and store semantics with software coherency
The UALink 200G 1.0 Specification, which defines a low-latency, high-bandwidth interconnect for communication between accelerators and switches in AI computing pods, is now available. The UALink 1.0 Specification enables 200G per lane scale-up connection for up to 1,024 accelerators within an AI computing pod, delivering the open standard interconnect for next-generation AI cluster performance.
“UALink is an important milestone for the advancement of Artificial Intelligence computing. Intel is proud to co-lead this new technology and bring our expertise in creating an open, dynamic AI ecosystem. As a founding member of this new consortium, we look forward to a new wave of industry innovation and customer value delivered through the UALink standard. This initiative extends Intel’s commitment to AI connectivity innovation that includes leadership roles in the Ultra Ethernet Consortium and other standards bodies.”
Sachin Katti, SVP & GM, Network and Edge Group, Intel Corporation
Our member companies represent a comprehensive range of industry expertise, including Cloud Service Providers, System OEMs, Accelerator developers, Switch developers, and IP providers.
You can be a part of the rapidly growing effort to advance UALink technology, helping to identify and implement usage models for the future of data center AI connectivity.
UALink™: an open industry Interconnect standard meeting market demand for advanced AI Accelerator-to-Accelerator communication.
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